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Event program
Wednesday, 9/30/2020 3:00 PM - 7:00 PM,
Bellavista, Grand hotel Adriatic, Opatija
3:00 PM - 5:00 PM Papers 
1.M. Zhang (KU Leuven, Leuven, Belgium), T. Markovic (imec, Leuven, Belgium), B. Nauwelaers (KU Leuven, Leuven, Belgium)
Microwave Interferometry Measurements of Yeast Cell Suspension and Sediment Process 
A microwave interferometry based coplanar waveguide sensor is proposed for cell dynamic process monitoring applications. Combining the ease of microfluidics integration and impedance modeling from coplanar waveguide with high sensitivity and wide frequency range from interferometer structure, the designed setup has proved its potential for biological applications. Based on characteristic of interferometer and sensor modeling, the algorithm for extraction of the material under test complex permittivity from the S-parameters changes has been developed. Measurement and calculation of 2 mg/ml yeast cell suspension have been carried out to validate the setup, which agreed well with reference data in literature. Furthermore, monitoring of yeast cell sediment process was performed to lay the groundwork for future cell growth monitoring.
2.I. Škalic, I. Marinović (FESB, Split, Croatia)
Energy Harvesting on Power Amplifiers Based on Application of Thermoelectric Generators 
This paper proposes a system for energy harvesting or converting wasted energy (heat) into electric energy using solid state thermoelectric generators (TEGs). As a source of heat, wasted energy on output power transistors of PA (power amplifier) in AB-class were used. Comparative performance analysis of two different commercially available TEGs was made in terms of thermal and internal electrical resistance, generated voltage and power. The main drawback which restricts wider usage of TEGs are their limits on the power conversion efficiency. Obtained result shows only 2.23% of successfully converted energy. In addition to measurements, further improvements of the harvesting setup were proposed.
3.Ž. Osrečki, J. Žilak, M. Koričić, T. Suligoj (Faculty of Electrical Engineering and Computing, Zagreb, Croatia)
Doherty Power Amplifier in Horizontal Current Bipolar Transistor (HCBT) Technology 
The first RF power amplifier (PA) in low-cost Horizontal Current Bipolar Transistor (HCBT) technology is demonstrated in this paper. Doherty PA is designed for the modern wireless communication devices at 2.4 GHz with high Peak-To-Average-Power-Ratio (PAPR). Microstrip technology is used for the design of matching circuits, phase shift lines, and bias networks, with very few discrete components for RF signal coupling and low-frequency bypassing. The HCBT Doherty PA provides output power of up to 22 dBm with collector efficiency of 45% over 4 dB of output power back-off (OPBO). Furthermore, the efficiency higher than 41.5% and output power of 19 dBm +/- 1.5 dB is achieved at 4-dB OPBO over the bandwidth of 100 MHz.
4.D. Vinko, D. Bilandžija, I. Biondić (Fakultet elektrotehnike, računarstva i informacijskih tehnologija Osijek, Osijek, Croatia)
Design Considerations for Mid-Power Receiver in Resonant Wireless Power Transfer System 
Resonant wireless power transfer offers high degree of freedom for the receiver positioning, but it also has higher restraints on the design of the receiver circuit. This paper discusses design considerations for the design of the receiver circuit for applications in mid-power range (10-100 W) using resonant wireless power transfer system. Wireless power receiver circuit consists of three main sub-circuits: resonant tank, rectifier circuit and DC-DC converter. The impact of each sub-circuit is analyzed with respect to efficiency and overall receiver circuit performance. Results from the mathematical models and simulations are compared with measurements. The final design of the receiver circuit is implemented in LCD TV and evaluated through laboratory measurements.
5.I. Brezovec, J. Mikulić, G. Schatzberger (ams AG, Premstaetten, Austria), A. Barić (University of Zagreb, Zagreb, Croatia)
Semi-Analytical Estimation of On-Chip Intertwined Rectangular Transformer Parameters in 180 nm CMOS Technology 
This paper presents the design methodology of an on-chip intertwined rectangular transformer in 180 nm CMOS technology intended for fully integrated LC oscillators. A simple model based on the physical interpretation of the transformer is presented. A method for fast estimation of inductance and magnetic coupling which takes into account the spacing between the turns is presented. Estimation of other parameters is given based on a combination of simple formulas, extraction from electromagnetic simulations and a fitting procedure. Four transformers with different turn ratios are simulated in HFSS and the results of the simulations to the fitted data of the lumped elements model are compared. The model’s relative error of S-parameters compared to the simulations is less than 5% for inductors and 10% for the transformer in a high frequency range.
6.G. Lemire, B. Pejcinovic (Portland State University, Portland, OR, United States)
Introduction to the Design and Simulation of Reflectionless Filters 
One novel approach to improving filter performance is to use so-called reflectionless filters which have recently been proposed. In this paper we demonstrate how to design, simulate and manufacture a reference reflectionless low-pass filter with the corner frequency of 188 MHz. We have found very good agreement between measurements, simulations, and published data, which validates our implementation of the design procedure. We have also designed a comparable diplexer so that we can examine the relative advantages and disadvantages of the reflectionless filters vs. diplexers. Measurements, simulations and published data, all agree very well in this case as well. This agreement extends into multi-GHz range, far into the filter stopband, which illustrates the high quality of the modeling tools used. The reflectionless filter has been verified to provide low return loss for all ports in the stopband which enables cascading. It also has a much simpler bill-ofmaterials and uses only three unique components, whereas the diplexer uses 32 unique components. On the other hand, the diplexer exhibits steeper initial fall-off after the 3-dB corner frequency and somewhat improved attenuation in the stopband.
5:00 PM - 7:00 PM Special Session OPHO 
Optoelectronics and Photonics /OPHO 
Thursday, 10/1/2020 9:00 AM - 12:30 PM,
Bellavista, Grand hotel Adriatic, Opatija
9:00 AM -10:40  AM Papers 
1.M. Kováč, D. Arbet, L. Nagy, M. Šovčík, V. Stopjaková (Slovak University of Technology in Bratislava, Bratislava, Slovakia)
Multi-Topology DC-DC Converter for Low Voltage Energy Harvesting Systems 
This paper deals with the design and analysis of a multi-topology DC-DC converter (MT-DC/DC), suitable for ultra-low voltage energy harvesters, such as thermoelectric, photovoltaic or biofuel-cell generators. MT-DC/DC was proposed and investigated as proof of concept with ultra-low voltage cold-start capability (deep sub-hundred mV) and implemented in 130 nm standard CMOS fabrication process. The use of multiple operating modes, such as the self-oscillation mode, inductive boost-mode based on transformer reuse technique, and tapped-inductor boost-mode, the MT-DC/DC achieves coverage of a wide range of input voltages. The design also includes a maximum power point tracking (MPPT) control loop, specifically designed for energy harvesting applications, and is capable to deliver more than 1 mW of power while maintaining a regulated output voltage of 1.2 V.
2.I. Kuljak, I. Tomić, R. Bertolan (FER, Zagreb, Croatia), J. Mikulić, G. Schatzberger, J. Fellner (ams, Premstaetten, Austria), A. Barić (FER, Zagreb, Croatia)
Design and Measurements of Low Power 32-kHz Oscillators and a Test Interface in 180-nm CMOS Technology 
This paper presents the design and measurements of two oscillators used as oscillator cores in the 1-Hz oscillator circuit. The output frequency drift is obtained by parametric analyses varying the supply voltage from 1.1 to 1.3 V, referent current from 70 to 140 nA, bias current from 35 to 70 nA and temperature from -40°C to 80°C. The oscillator chip is processed and measured. The frequency characteristics are extracted from measurements using the test interface. The built-in test interface is supplied by an external power supply whose nominal voltage is 1.8 V. The voltage buffer within the test interface allows for indirect measurement of signals on high impedance nodes. The voltage buffer output is capable of driving standard digital multimeter (DMM) input loads.
3.D. Tomic (Faculty of electrical engineering and computer science, Zagreb, Croatia), J. Mikulic, G. Schatzberger, J. Fellner (ams AG, Premstaetten, Austria), A. Baric (Faculty of electrical engineering and computer science, Zagreb, Croatia)
Programmable Low-Frequency Divider in 180-nm CMOS Technology 
This paper presents the design and measurements of a programmable frequency divider that converts the input clock of 32-kHz to 1 Hz. The circuit is designed, simulated and layouted in Cadence simulation environment. The output frequency drift and current consumption are obtained by paramteric analyses for the varying supply voltage from 1.1 to 1.3 V and temperature from -40°C to 125°C. The analysis of current consumption is conducted for three different binary counters and based on these results, the synchronous counter with an asynchronous reset is selected.
4.D. Osmanovic, I. Skeledzija, K. Spoljaric, D. Tomic (University of Zagreb/Faculty of Electrical Engineering and Computing, Zagreb, Croatia), J. Mikulic, G. Schatzberger, J. Fellner (ams AG, Premstaetten, Austria), A. Baric (University of Zagreb/Faculty of Electrical Engineering and Computing, Zagreb, Croatia)
Design of a Tunable Temperature Coefficient Voltage Reference with Low-dropout Voltage Regulator in 180-nm CMOS Technology 
This paper presents the voltage reference having a tunable temperature coefficient and a low-dropout voltage supply. The circuit has been designed using the Cadence Virtuoso software package and afterwards manufactured and measured. It is possible to arbitrarily set the first-order temperature coefficient to achieve compensation of the oscillator resultant temperature coefficient. The low-dropout voltage regulator provides a nominal output voltage of 1.2 V with a maximum output current of 2 uA. It requires a 600 mV voltage reference and 50 nA current reference for proper operation. As a result of the analysis, it is concluded that the voltage reference has a default temperature coefficient of -37.7 ppm/°C. The voltage reference is buffered and additionally compensated using the tunable temperature coefficient resistor with the step of 20 ppm/°C controlled by a 4-bit input vector and temperature coefficient range of ±150 ppm/°C.
5.M. Haberler, I. Siegl, C. Steffan (Infineon Technologies Austria AG, Graz, Austria), M. Auer (Graz University of Technology, Graz, Austria)
Mismatch Reduction Techniques for Current-Mirror Based Potentiostats 
Current-mirror based potentiostats suffer from systematic and random errors that mainly appear due to mismatch in the current-mirror. To limit the standard deviation of the error to less than 1.1% over a dynamic range of four decades, either a high overdrive voltage or comparable big transistor dimensions are required. In this work, an optimized design approach for the current-mirror is presented. Based on the given accuracy and dynamic range requirements, an optimized programmable current-mirror is implemented. An accuracy driven design approach is used to achieve the required accuracy over the wide range of sensor currents, while keeping the area consumption low. Compared to a linearly scaled current-mirror based potentiostat design, an output stage area reduction by a factor of four is achieved. Additionally, the voltage headroom consumption is kept at a minimum. The potentiostat is implemented in a 130nm CMOS technology and consumes an area of only 0.14mm2. The simulation results show that even in the worst case the specified accuracy is achieved over the complete dynamic range of sensor currents from nA to mA.
10:40 AM -11:00 AM Break 
11:00 AM - 12:20 PM Papers  
6.I. Tolić, J. Mikulić, G. Schatzberger (ams AG, Premstaetten, Austria), A. Barić (FER, Zagreb, Croatia)
Design of CMOS Temperature Sensors Based on Ring Oscillators in 180-nm and 110-nm technology 
In this work two on-chip smart temperature sensors are presented. Both designs are based on two ring oscillators operating complementary. The readout circuit is achieved using time-to-digital converter and digital counter. The first sensor is designed in 180-nm technology, and the other is designed in 110-nm. The simulation results from both sensors are presented in the temperature range from -40 to 125°C. The first design achieves an accuracy of +4.9/-0.2°C, while the other achieves an accuracy of ±3.8°C.
7.D. Spasov (Ss Cyril and Methodius University, Skopje, Macedonia)
A Circuit for Identifying Oldest Ready Instructions in Reservation Stations 
Microprocessors use reservation stations to host instructions that are waiting to be sent to the execution units. Reservation stations may include selection logic configured to select oldest ready instructions for execution. Conventional selection logic uses age matrices to track relative age among instructions. In this paper, we propose an alternative circuit for tracking the relative age among instructions in reservation stations. The proposed selection logic uses wrap bits and reorder buffer indexes to track relative age among instructions. We compare the proposed selection logic with the conventional selection logic and discuss advantages.
8.D. Spasov (Ss Cyril and Methodius University, Skopje, Macedonia)
An Improvement in the Convergence of Superscalar Processors  
Modern processors include reservation stations to host instructions that are waiting to be sent to the execution units. Responsive to exception event, instructions in reservation stations that are younger than the instruction executed with exception need to be flushed. In this paper, we propose a mechanism for flushing instructions from reservation stations. The proposed mechanism determines relative age between instructions in reservation stations and instruction executed with exception by comparing reorder buffer indexes assigned to the instructions in reservation stations with the tail pointer of the reorder buffer and with the reorder buffer index of the instruction executed with exception. Instructions younger than the instruction executed with exception are flushed from the reservation stations.
9.D. Spasov (Ss Cyril and Methodius University, Skopje, Macedonia)
Sequential Register Renaming 
Register renaming unit is a bottleneck in the superscalar cores because it limits the number of instructions and the number of threads that may concurrently be processed. We propose a register renaming unit with linear complexity with respect to the number of instructions simultaneously renamed. The proposed renaming unit renames source operands in a sequential manner following the program order of the instructions. We show that in worst case sequential register renaming may follow contemporary trends with respect to the number of instructions and the number of threads that may be simultaneously renamed.
Thursday, 10/1/2020 3:00 PM - 6:45 PM,
Bellavista, Grand hotel Adriatic, Opatija
3:00 PM - 4:40 PM Papers 
1.M. Poljak (Faculty of Electrical Engineering and Computing , Zagreb, Croatia)
Material and Device Properties of Bismuthene Nanoribbons from Multi-orbital Quantum Transport Simulations 
A multi-orbital tight-binding Hamiltonian is employed to study the electronic, transport and ballistic device properties of bismuthene nanoribbons (BiNRs) within the non-equilibrium Green's function (NEGF) formalism. We report the bandgap-width dependence that demonstrates an increase from 0.57 eV to 0.84 eV when the BiNR width is downscaled from 10.3 nm to 1.1 nm. The relevance of BiNRs for logic device applications at the nanoscale is further analyzed by studying the width-dependence of the ON and OFF state conductance and their ratio that reaches ~10^7 in 1.1 nm-wide BiNRs. Moreover, BiNR FET simulations reveal ballistic ON-state drain currents of up to 5.1 mA/μm, surpassing those of graphene nanoribbon FETs by 38% at 0.5 V supply voltage.
2.M. Mihaljević, M. Širić (Faculty of Electrical Engineering and Computing, Zagreb, Croatia), M. Poljak (Faculty of Electrical Engineering and Computing , Zagreb, Croatia)
Single-band Quantum Transport Study of Resonant Tunneling Diodes Based on Silicene Nanoribbons 
The 1D quantum transport simulations based on a single-band effective-mass Hamiltonian are employed to study resonant tunneling diodes (RTDs) based on width-engineered silicene nanoribbons (SiNRs). Numerical analysis is used to assess the peak and valley current and voltage, peak-to-valley current ratio (PVCR), mean negative differential conductance (NDC), maximum output power (PMAX) and intrinsic cut-off frequency (fc), for different dimensions of device regions. We find that a typical nanoscale SiNR-based RTD could potentially offer a peak current of ~8 mA/µm2, PVCR of 1.6, NDC of ~30 mS/µm2, PMAX of ~100 µW/µm2, and fc of ~3 THz.
3.T. Župančić, I. Stresec, M. Poljak (Faculty of Electrical Engineering and Computing , Zagreb, Croatia)
Predicting the Transport Properties of Silicene Nanoribbons Using a Neural Network 
Atomistic quantum transport simulations are used to generate the electronic and transport properties of 10,000 realistic silicene nanoribbons (SiNRs) with edge defects. This ensemble of 20 nm-long and 2.1 nm-wide SiNRs is divided into the training and inference set for the artificial neural network (ANN) employed for the prediction of edge-defect-limited carrier mobility from the known values of bandgap and nanoribbon conductance. We find that an optimized ANN with 3 hidden layers can predict SiNR mobility values and variability histograms with acceptable accuracy, thus providing a useful supplement to atomistic quantum transport simulations that take several hours or days for large device ensemble sizes.
4.L. Marković, T. Knežević, T. Suligoj (Faculty of Electrical Engineering and Computing, Micro and Nano Electronics Laboratory, Zagreb, Croatia)
Modeling of Electrical Properties of Al-on-Ge-onSi Schottky Barrier Diode 
In this work, different mechanisms that could cause degradation of the ideality factor in Al/Ge Schottky diodes on Si substrate are examined. Measured I-V characteristics of Schottky diodes have been fitted by the model of the diode developed in TCAD environment. The effects of Shockley-Read-Hall recombination parameters of epitaxial Ge on the I-V characteristics are simulated. The impact of interface traps on both Al/Ge and Ge/Si interfaces, as well as the effect of a buffer oxide layer on Al/Ge interface are analyzed by simulations providing a possible explanation for a degraded ideality factor in Al/Ge-on-Si Schottky diodes.
5.I. Berdalović, M. Poljak, T. Suligoj (Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia)
On the Modelling of Interface Roughness Scattering in AlGaN/GaN Heterostructures 
AlGaN/GaN heterostructures are attractive for high-power radiofrequency applications due to the wide bandgap of GaN and the high values of spontaneous and piezoelectric polarisation in such material systems, which lead to high breakdown voltages and high 2D carrier concentrations. It is of particular interest to accurately model the 2DEG mobilities in these structures, as different scattering mechanisms can limit the total mobility at different temperatures and carrier concentrations. In this paper, we present a semi-classical modelling framework for low-field mobility in AlGaN/GaN heterostructures, focussing especially on the impact of interface roughness (IFR) scattering on the low-temperature mobility. The framework is validated by comparing calculated mobility values with experimental data, and different ways of modelling the IFR scattering are investigated. A non-linear IFR scattering model is used to obtain the best match to measured data for different Al-contents in the AlGaN layer in case of a low potential barrier at the heterointerface, while the temperature dependence of mobility with a high potential barrier in an AlGaN/AlN/GaN system is best matched with IFR models where the squared scattering matrix elements depend linearly on the roughness power spectrum.
4:40 PM - 5:00 PM Break 
5:00 PM - 5:40 PM Invited Lecture  
D. Grubisic, D. Babic (Laser Components DG, Inc., Tempe, United States)
Infrared Quantum Detectors 
Quantum detectors respond to electromagnetic radiation by generating a photocurrent. The detection mechanism involves absorption of photons whose energy exceeds the band gap of the detector material. The absorption generates excited mobile charge carriers (electron hole pairs) that form the photocurrent. The quantum detectors sensitive in near infrared (NIR) and middle infrared (MIR) wavelength range will be discussed. Different quantum detector types will be outlined including their detection mechanism and performance. Most recent developments in room temperature type-II strained-layer superlattice or digital alloy detectors with sensitivity range between 3 – 5 micrometers will be included.
5:40 PM - 6:40 PM Papers 
6.M. Wanitzek, M. Oehme, D. Schwarz, K. Guguieva, J. Schulze (Institute for Semiconductor Engineering, Stuttgart, Germany)
Ge-on-Si Avalanche Photodiodes for LIDAR Application 
In order to make autonomous driving in cars possible, a precise knowledge of the immediate surroundings is required. One technology for near-field detection is the LIDAR (light detection and ranging) technology. Currently available LIDAR systems operate at a wavelength of 905 nm. However, for wavelengths from 1,300 nm, a significant increase in range resolution is achieved. Here, the receiver side is typically realized as APDs (avalanche photodiodes). In this work the fabrication and characterization of APDs with an absorption region made from Germanium (Ge) are presented. The layer sequence for the APDs are grown directly on Silicon (Si) substrate using a molecular beam epitaxy system. At room temperature the Ge-on-Si-APDs achieve responsivities of up to 6 A/W at a wavelength of 1,310 nm, which corresponds to a gain of 26 compared to conventional Ge photodiodes.
7.A. Čaušević, University of Stuttgart , Stuttgart, Germany), H. Funk, University of Stuttgart , Stuttgart, Germany), D. Schwarz, University of Stuttgart , Stuttgart, Germany), K. Guguieva, University of Stuttgart , Stuttgart, Germany), J. Schulze (Institute of Semiconductor Engineering (IHT), University of Stuttgart , Stuttgart, Germany)
Processing Sequence for a PureB Bipolar Junction Transistor 
Since we have previously shown that the deposi-tion of pure Boron (PureB) on Silicon (Si) forms an almost ideal pn-junction, the next step is to utilize this technology towards a high-speed pnp bipolar junction transistor (BJT) made from Si. Here, the Emitter is made from a PureB. The PureB layer is extremely thin and features an almost defect-free pn-junction, a low off-current and a low series resistance, which makes it feasible to achieve better characteristics than the conventional BJT. However, PureB is very unreactive and therefore hard to etch, which results in a high roughness of the underlying semiconductor after etching. That is why it is challenging to build a three-terminal device such as a BJT. In this work, we present a novel process scheme using a double-layer hardmask of Silicon dioxide (SiO2) and Aluminum oxide (Al2O3) to enable differential epitaxy of PureB. Onto the substrate a layer stack of SiO2 and Al2O3 was deposited and structured, the Al2O3 was then recrystallized to be used as an etch stop. PureB was deposited subsequently by differ-rential epitaxy into the SiO2 windows.
8.M. Dettling, University of Stuttgart , Stuttgart, Germany), D. Weißhaupt, University of Stuttgart , Stuttgart, Germany), H. Funk (Institute of Semiconductor Engineering (IHT), University of Stuttgart , Stuttgart, Germany), M. Kern (Institute of Physical Chemistry (IPC), University of Stuttgart , Stuttgart, Germany), F. Berkmann, University of Stuttgart , Stuttgart, Germany), C. Clausen, University of Stuttgart , Stuttgart, Germany), M. Oehme, University of Stuttgart , Stuttgart, Germany), D. Schwarz (Institute of Semiconductor Engineering (IHT), University of Stuttgart , Stuttgart, Germany), J. van Slageren (Institute of Physical Chemistry (IPC), University of Stuttgart , Stuttgart, Germany), J. Schulze (Institute of Semiconductor Engineering (IHT), University of Stuttgart , Stuttgart, Germany)
Carrier Mobilities in Heavily Doped Pseudomorphic Ge1-xSnx-epilayers 
This work reports on the carrier mobilities in heavily doped, pseudomorphically grown Ge1-xSnx-epilayers with Sn-concentrations up to 9.2 %. For this purpose, Ge1-xSnx-alloys were grown on a relaxed Ge virtual substrate on top of a commercial Si (100) wafer using molecular beam epitaxy (MBE). The crystal structure and quality of the Ge1-xSnx-epilayers were analyzed by high-resolution X-ray diffraction (XRD). In order to extract the carrier mobilities in Ge1-xSnx, low temperature hall measurements were carried out, using a Van-der-Pauw-Geometry. It is shown that with increasing Sn-concentration we find a decrease in carrier mobility, which corresponds to an increasing sheet-resistance.
Friday, 10/2/2020 9:00 AM - 11:45 AM,
Bellavista, Grand hotel Adriatic, Opatija
9:00 AM - 11:40 AM Papers 
1.M. Batelić, M. Stipčević (Ruđer Bošković Institute, Zagreb, Croatia)
Improved Circuits for a Random Pulse Computer 
We present improved circuits intended for building a universal computer based on Random Pulse Computing (RPC) paradigm, a biologically-inspired way of computation in which variable is represented by a frequency of a Random Pulse Train (RPT) rather than a logic state. The RPC we mention here is also known as "stochastic unipolar computation" in newer literature. Unlike in previous art, where randomness is obtained from electronics noise or a pseudorandom shift register while processing circuitry is deterministic, in our approach both variable generation and signal processing rely on the random flip-flop (RFF), whose randomness is derived from a fundamentally random quantum process. This offers better conceptual simplicity and may lead to better precision in chained operations due to the higher randomness of output RTPs.
2.K. Sever (Ericsson Nikola Tesla d.d., Zagreb, Croatia), T. Vlašić, D. Seršić (Sveučilište u Zagrebu Fakultet elektrotehnike i računarstva, Zagreb, Croatia)
A Realization of Adaptive Compressive Sensing System 
There are numerous papers analyzing the theoretical background of compressive sensing (CS), but a few practical implementations exist due to the realization complexity. In this paper, a realization of a system for CS of analog one-dimensional signals in a shift-invariant subspace is proposed. We use statistical compressive sensing that allows efficient sampling of signals that follow some statistical distribution. In fact, principal component analysis is used to obtain a small number of principal components in which the majority of signal’s energy is compacted. The signal is demodulated using the obtained principal components, which provides optimal measurement procedure in the meansquare error sense. Orthonormality allows for a linear reconstruction which is perfectly suited for a real-time embedded system implementation. Due to hardware realization constraints, the adaptive demodulating signal is quantized. We provide qualitative and quantitative validations based on simulations of the proposed CS system realization. Furthermore, we validate performance of the system when additive white Gaussian noise is present in the measurements.
3.A. Ćoza, V. Županović, D. Vlah, D. Jurišić (University of Zagreb/Faculty of electrical engineering and computing, Zagreb, Croatia)
Group Delay of Fractional n+alpha-Order Bessel Filters 
In this paper we present the realization of fractional-order analog filter with Bessel approximation, having linear phase response, which is also usually represented by a constant group delay. There are many applications such as analogue video signal processing, radar and sonar receivers, hard disk drive read channel applications, analog front end of biomedical signal processing, where linear phase response is desirable. Optimally designed Bessel filter can provide better transient response in the passband, it reduces overshoot, ringing and provides minimal phase distortion. In this work we research Bessel approximation with the non-integer order n+alpha, where n is integer number and alpha is a positive fractional number lower than unity. The influence of non-integer filter order to the value of the constant group delay of the filter is presented. It is shown that the group delay value can be additionally tuned by changing parameter alpha.
4.E. Barucija, A. Akagic, S. Ribic, Z. Juric (University of Sarajevo, Sarajevo, Bosnia and Herzegovina)
Two Approaches for Solving Rubik's Cube with Hardware/Software Co-design 
Algorithms for its solving Rubik's cube are an active research area since the first appearance of the cube in 1974. The main goal of algorithms is to solve the cube in as few moves as possible. In this paper, a System-on-Chip is used to solve the random configuration of Rubik's cube. Two algorithms are used: the basic algorithm and Kociemba algorithm. The basic algorithm is easy to comprehend but requires more moves to solve the cube. It requires memorization of only sequences of steps. The Kociemba algorithm solves the cube in about 25 moves and requires some pre-processing tasks (depth-first search and pruning trees). This algorithm can be implemented on a robot to solve the cube relatively fast. Both algorithms are implemented and tested on a new robot platform, which successfully solves any random cube's configuration. Performances of both algorithms are measured, and the two algorithms are compared.
5.A. Serov (National Research University “Moscow Power Engineering Institute”, Moscow, Russian Federation)
A Methodology for Frequency-Measurement Characterization Based on Increment of Input Signal Phase 
It is known that the signals of modern power networks are non-sinusoidal, and in this case frequency measurement methods for sinusoidal signals cannot be effectively applied. The widely applied measurement method, based on cross-zero technique, requires a long measurement time. In a number of problems of power quality parameters measurement, this drawback is significant and necessitates the application of a faster measurement method, which allowing measurements for nonsinusoidal input signals. In this paper discusses a frequency measurement method based on determination of increment of input signal phase. The phase value is determined by applying of the discrete Fourier transform (DFT). An analysis of influence of additive, multiplicative and nonlinear components of the samples error to the frequency measurement error for the considered measurement method is performed. The influence of the measurement system parameters on the algorithmic error component is investigated. Recommendations to significantly reduce of the error have been developed. Analytical relationships that allows to evaluate the algorithmic component of the measurement error are obtained. A simulation model of the considerate measurement method is developed by Matlab software package. The reliability of the analytical relationships is confirmed by the coincidence of the results which are obtained by analytical expressions and the results of simulation modeling at check points.
6.A. Serov, A. Shatokhin, N. Serov (National Research University “Moscow Power Engineering Institute”, Moscow, Russian Federation)
Comparative Analysis Of the Active Power Measurement Methods in Time Domain 
Active power is one of the most informative parameters of the power grids signals. Signals of present power grids are non-sinusoidal. There are harmonics, noise and flicker (sinusoidal or rectangular). For this reason, the methods used to measure active power must take into account the above signal features. The article discusses two of the most popular measurement methods of the active power in the time domain: the method based on averaging the instantaneous power and the method of low-pass filtration of instantaneous power. For these methods, analytical expressions are obtained that allows to estimate the measurement error of active power in the case of a polyharmonic input signal. Simulation modeling was performed to evaluate the metrological characteristics of the considerate methods in Matlab. The research of influence of the signal parameters on the measurement error is performed. The implementation features, advantages and disadvantages of each method are considered. Approaches to improve the accuracy of the active power measurements when performing additional measurements of power frequency are proposed. It is shown that in the case of using a moving average (single-stage) filter, both considered methods are equivalent. The reliability of analytical expressions is confirmed by comparing of the analytical and simulation modeling results at check points.
7.Z. Šverko, S. Vlahinić , M. Vrankić , I. Markovinović (University of Rijeka – Faculty of Engineering/Department of Automatics and Electronics, Rijeka, Croatia)
Delta/Alpha Ratio for Diagnosis of Autism Spectrum Disorder 
EEG data signal processing has been performed in order to outline the parameters for the comparison between participants with autism (5 subjects) and typically developing children acting as the control group (14 subjects). Based on the previous studies, the autistic group has a significantly higher delta/alpha ratio than the typical developing children. In this paper, we have tested this hypothesis on new participants. Furthermore, statistical features such as mean value, grand-mean value and their ratios have been calculated. The research was conducted by observing signals on electrodes F3, Fz, F4, C3, Cz, C4, P3, Pz and P4. We observed power delta-alpha, theta-high beta, theta-low beta, theta-alpha ratio, grand mean values of magnitude spectrum and 1st moments of the grand mean values of the spectral distribution. The statistically significant difference between observed groups we found when tested 1st moments of the grand mean values of the spectral distribution.
8.J. Kundrata (Faculty of Electrical Engineering and Computing University of Zagreb, Zagreb, Croatia), D. Fujimoto, Y. Hayashi (Nara Institute of Science and Technology, Ikoma, Japan), A. Barić (Faculty of Electrical Engineering and Computing University of Zagreb, Zagreb, Croatia)
Comparison of Pearson Correlation Coefficient and Distance Correlation in Correlation Power Analysis on Digital Multiplier 
Correlation power analysis (CPA) is a side-channel attack (SCA) which exploits the information leaked through the power supply current and voltage, or the electromagnetic emissions of the attacked digital system. It uses statistical analysis of a large number of power supply measurements to retrieve the secrets of the digital system. Correlation power analysis uses a number of hypothetical secret keys which are correlated to the measurements of the attacked system. Usually correlation power analysis uses the Pearson correlation coefficient, but the intermediary values and the power supply measurements can have a nonlinear relationship. The paper investigates the application of the distance correlation in the correlation power analysis and compares it to the Pearson correlation coefficient. The comparison is based on a side-channel attack on a multiplication operation of an input message and a secret key. The results of the comparison show that the distance correlation achieves a higher prominence of the correct secret key than the Pearson correlation coefficient.

Basic information:
Chairs:

Marko Koričić (Croatia), Željko Butković (Croatia)

Steering Committee:

Slavko Amon (Slovenia), Dubravko Babic (Croatia), Maurizio Ferrari (Italy), Mile Ivanda (Croatia), Branimir Pejčinović (United States), Jörg Schulze (Germany), Tomislav Suligoj (Croatia), Aleksandar Szabo (Croatia), Davor Vinko (Croatia)

Registration / Fees:
REGISTRATION / FEES
Price in EUR
EARLY BIRD
Up to 14 September 2020
REGULAR
From 15 September 2020
Members of MIPRO and IEEE
200
230
Students (undergraduate and graduate), primary and secondary school teachers
120
140
Others
220
250

The discount doesn't apply to PhD students.

Contact:

Marko Koricic
University of Zagreb
Faculty of Electrical Engineering and Computing
Unska 3
HR-10000 Zagreb, Croatia

Phone: +385 1 6129 671
GSM: +385 98 671 391
Fax: +385 1 6129 653
E-mail: marko.koricic@fer.hr

The best papers will get a special award.
Accepted papers will be published in the ISSN registered conference proceedings. Presented papers will be submitted for inclusion in the IEEE Xplore Digital Library (and exlusively not presented papers with the justified reason for not being able to be presented).
.............
There is a possibility that the selected scientific papers with some further modification and refinement are being published in the Journal of Computing and Information Technology (CIT).


Location:

Opatija, with its 170-year-old tourism tradition, is the leading seaside resort of the Eastern Adriatic and one of the most famous tourist destinations on the Mediterranean. With its aristocratic architecture and style, Opatija has been attracting artists, kings, politicians, scientists, sportsmen, as well as business people, bankers and managers for more than 170 years.

The tourist offer in Opatija includes a vast number of hotels, excellent restaurants, entertainment venues, art festivals, superb modern and classical music concerts, beaches and swimming pools – this city satisfies all wishes and demands.

Opatija, the Queen of the Adriatic, is also one of the most prominent congress cities in the Mediterranean, particularly important for its ICT conventions, one of which is MIPRO, which has been held in Opatija since 1979, and has attracted more than a thousand participants from over forty countries. These conventions promote Opatija as one of the most desirable technological, business, educational and scientific centers in South-eastern Europe and the European Union in general.


For more details, please visit www.opatija.hr and visitopatija.com.

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